SH7764 Datasheet, PDF (1474/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 28 Power-Down Mode
Initial
Bit
Bit Name Value R/W Description
4
G2D
0
R/W G2D Module Stop Bit
When set to 1, the clock supply to the G2D module is
halted.
0: G2D operates
1: Clock supply to G2D is halted
3

0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
2
VDC2
0
R/W VDC2 Module Stop Bit
When set to 1, the clock supply to the VDC2 module is
halted.
0: VDC2 operates
1: Clock supply to VDC2 is halted
1

0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
0
USB
0
R/W USB Module Stop Bit
When set to 1, the clock supply to the USB module is
halted.
0: USB operates
1: Clock supply to USB is halted
Rev. 1.00 Nov. 22, 2007 Page 1418 of 1692
REJ09B0360-0100