SH7764 Datasheet, PDF (207/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 7 Memory Management Unit (MMU)
There are two methods by which the MMU can perform mapping from virtual memory to physical
memory: the paging method, using fixed-length address translation, and the segment method,
using variable-length address translation. With the paging method, the unit of translation is a
fixed-size address space called a page.
In the following descriptions, the address space in virtual memory in the SH-4A is referred to as
virtual address space, and the address space in physical memory as physical address space.
Process 1
Physical
Memory
Physical
Process 1 _Memory
Process 1
Virtual
Memory _{MMU Physical}
Memory
(0)
(1)
(2)
Process 1
Physical
Memory
Process 2
Virtual
Process 1 Memory
MMU Physical
Memory
Process 2
Process 3
Process 3
(3)
(4)
Figure 7.1 Role of MMU
Rev. 1.00 Nov. 22, 2007 Page 151 of 1692
REJ09B0360-0100