SH7764 Datasheet, PDF (1230/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 G2D
1. Code
B'00011000
2. Rendering Attributes
Draw Mode
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Fixed Fixed Fixed Fixed Fixed LINKE LREL Fixed Fixed Fixed Fixed Fixed ByteM3 ByteM2 ByteM1 ByteM0
to 0 to 0 to 0 to 0 to 0
to 0 to 0 to 0 to 0 to 0
3. Command Parameters
W reg No:
Data n (n = 1 to 256):
n − 1:
LINK Address:
Register number
Write data
The number of write data
LINK absolute address (Longword address. Write 0 to bits A31 to
A29, A1, and A0.)
LINK relative address (Longword address. Negative number
expressed as two's complement. Bits A31 to A29 are used to extend
the sign in bit A28. Write 0 to bits A1 and A0.)
Note: Even in 32-bit addressing mode, write the values in bits 28 to 3 of the specified 32-bit
address to bits A28 to A3.
(c) Description
Writes data to the address-mapped registers. The register number is set in W reg No, and the write
data in Data n.
Also ensure that there is no conflict with access by the CPU.
1. When the LINKE bit is set to 1, data is read from the memory address specified by the LINK
Address and written to a register.
2. The LINK Address can be specified through the LREL bit as an absolute address or a relative
address with respect to the memory address at which the WPR command code is located.
3. Setting the ByteM3 to ByteM0 bits to 1 allows writing to a register to be masked in byte units.
Rev. 1.00 Nov. 22, 2007 Page 1174 of 1692
REJ09B0360-0100