SH7764 Datasheet, PDF (510/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 Interrupt Controller (INTC)
Bit
Bit Name
18
PINT10E
17
PINT9E
16
PINT8E
15 to —
12
11
PINT7E
10
PINT6E
9
PINT5E
8
PINT4E
7 to 4 —
3
PINT3E
2
PINT2E
1
PINT1E
0
PINT0E
Initial
Value
0
0
0
All 0
0
0
0
0
All 0
0
0
0
0
R/W Function
Description
R/W Enables a GPIO interrupt
request from PINT10 pin
R/W Enables a GPIO interrupt
request from PINT9 pin
R/W Enables a GPIO interrupt
request from PINT8 pin
R Reserved
Enables a GPIO
interrupt request for
each pin.
0: Disables an interrupt
request
1: Enables an interrupt
request
These bits are always read as 0.
The write value should always
be 0.
R/W Enables a GPIO interrupt
request from PINT7 pin
R/W Enables a GPIO interrupt
request from PINT6 pin
R/W Enables a GPIO interrupt
request from PINT5 pin
R/W Enables a GPIO interrupt
request from PINT4 pin
R Reserved
These bits are always read as 0.
The write value should always
be 0.
R/W Enables a GPIO interrupt
request from PINT3 pin
R/W Enables a GPIO interrupt
request from PINT2 pin
R/W Enables a GPIO interrupt
request from PINT1 pin
R/W Enables a GPIO interrupt
request from PINT0 pin
When GPIO ports are used as interrupt ports, if the GPIO detects an interrupt, the interrupt is
notified to the INTC from the GPIO. However, it is indicated as a one-bit source in the INT2A0 or
INT2A1 register of the INTC. Referring to the on-chip module interrupt source register INT2B7.
Referring to the INTEVT code in the CPU can specify from which port group an interrupt is
generated.
Rev. 1.00 Nov. 22, 2007 Page 454 of 1692
REJ09B0360-0100