SH7764 Datasheet, PDF (1473/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 28 Power-Down Mode
Initial
Bit
Bit Name Value R/W Description
11

0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
10
SCIF2
0
R/W SCIF2 Module Stop Bit
When set to 1, the clock supply to the SCIF2 module is
halted.
0: SCIF2 operates
1: Clock supply to SCIF2 is halted
9
SCIF1
0
R/W SCIF1 Module Stop Bit
When set to 1, the clock supply to the SCIF1 module is
halted.
0: SCIF1 operates
1: Clock supply to SCIF1 is halted
8
SCIF0
0
R/W SCIF0 Module Stop Bit
When set to 1, the clock supply to the SCIF0 module is
halted.
0: SCIF0 operates
1: Clock supply to SCIF0 is halted
7
ETHER 0
R/W ETHER Module Stop Bit
When set to 1, the clock supply to the ETHER module
is halted.
0: ETHER operates
1: Clock supply to ETHER is halted
6
IIC
0
R/W IIC Module Stop Bit
When set to 1, the clock supply to the IIC module is
halted.
0: IIC operates
1: Clock supply to IIC is halted
5
ATAPI
0
R/W ATAPI Module Stop Bit
When set to 1, the clock supply to the ATAPI module is
halted.
0: ATAPI operates
1: Clock supply to ATAPI is halted
Rev. 1.00 Nov. 22, 2007 Page 1417 of 1692
REJ09B0360-0100