SH7764 Datasheet, PDF (25/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

23.2.4 Work Line Drawing Commands ......................................................................... 1151
23.2.5 Rectangle Drawing Commands .......................................................................... 1155
23.2.6 Control Commands ............................................................................................. 1166
23.3 Register Specifications..................................................................................................... 1184
23.3.1 System Control Registers.................................................................................... 1190
23.3.2 Memory Control Registers.................................................................................. 1196
23.3.3 Color Control Registers ...................................................................................... 1201
23.3.4 Rendering Control Registers............................................................................... 1204
23.3.5 Coordinate Transformation Control Registers .................................................... 1212
Section 24 Video Display Controller (VDC2).................................................1221
24.1 Overview.......................................................................................................................... 1221
24.2 Features............................................................................................................................ 1221
24.3 Input/Output Pins ............................................................................................................. 1223
24.4 VDC2 Configuration........................................................................................................ 1224
24.5 Functional Descriptions ................................................................................................... 1226
24.5.1 Graphics (Layers 1 to 4) ..................................................................................... 1226
24.5.2 Sync Signal Generation....................................................................................... 1227
24.5.3 External Sync Mode............................................................................................ 1230
24.5.4 Digital Video Output .......................................................................................... 1230
24.5.5 Conversion from RGB565 to YC444.................................................................. 1231
24.5.6 Conversion from YC444 to YC422 .................................................................... 1231
24.5.7 Data Enable Signal (Composite)......................................................................... 1232
24.6 Register Descriptions ....................................................................................................... 1233
24.6.1 Graphics Block Control Registers (GRCMEN1 to GRCMEN4)........................ 1239
24.6.2 Bus Control Registers (GRCBUSCNT1 to GRCBUSCNT4)............................. 1241
24.6.3 Graphic Image Base Address Registers (GROPSADR1 to GROPSADR4) ....... 1242
24.6.4 Graphic Image Area Registers (GROPSWH1 to GROPSWH4)......................... 1243
24.6.5 Graphic Image Line Offset Registers (GROPSOFST1 to GROPSOFST4) ........ 1245
24.6.6 Graphic Image Start Position Registers (GROPDPHV1 to GROPDPHV4)....... 1246
24.6.7 α Control Area Registers (GROPEWH2 to GROPEWH4) ................................ 1246
24.6.8 α Control Area Start Position Registers
(GROPEDPHV2 to GROPEDPHV4)................................................................. 1247
24.6.9 α Control Registers (GROPEDPA2 to GROPEDPA4) ...................................... 1249
24.6.10 Chroma-Key Control Registers (GROPCRKY0_2 to GROPCRKY0_4)........... 1251
24.6.11 Chroma-Key Color Registers (GROPCRKY1_2 to GROPCRKY1_4).............. 1252
24.6.12 Color Registers for Outside of Graphic Image Area
(GROPBASERGB1 to GROPBASERGB4)....................................................... 1253
24.6.13 SG Mode Register (SGMODE) .......................................................................... 1255
24.6.14 Interrupt Output Control Register (SGINTCNT)................................................ 1257
Rev. 1.00 Nov. 22, 2007 Page xxv of lvi