SH7764 Datasheet, PDF (431/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 12 Direct Memory Access Controller (DMAC)
Initial
Bit
Bit Name Value R/W Descriptions
13, 12 SM[1:0] 00
R/W Source Address Mode
Specify whether the DMA source address is
incremented, decremented, or left fixed.
00: Fixed source address
01: Source address is incremented
+1 in byte units transfer
+2 in word units transfer
+4 in longword units transfer
+16 in 16-byte units transfer
+32 in 32-byte units transfer
10: Source address is decremented
–1 in byte units transfer
–2 in word units transfer
–4 in longword units transfer
Setting prohibited in 16/32-byte units transfer
11: Setting prohibited
11 to 8 RS[3:0] 0000
R/W Resource Select
Specify which transfer requests will be sent to the
DMAC. The changing of transfer request source should
be done in the state that the DMA enable bit (DE) is
cleared to 0.
0000: External request, dual address mode
0100: Auto request
1000: Selected by DMA extended resource selector (for
on-chip modules)
Other than above: Setting prohibited
Note:
External request specification is valid only in
CHCR0 and CHCR1. None of the external
request can be selected in CHCR2 to CHCR5.
On-chip peripheral module request specification
is valid in CHCR0 to CHCR5.
Rev. 1.00 Nov. 22, 2007 Page 375 of 1692
REJ09B0360-0100