SH7764 Datasheet, PDF (522/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 Interrupt Controller (INTC)
13.7 Usage Notes
13.7.1 To Clear Interrupt Request When Holding Function Selected
When an IRQ level-sense interrupt is generated and the holding function is in use, the interrupt
request must be cleared in the interrupt handling routine after it has been accepted.
Start of IRQ level-sense
interrupt handling
Interrupt handling
Instruct the external device to cancel
the IRQ level interrupt request by
using the GPIO output or writing to
an address in the local bus
1) Writing to the GPIO register or local
bus space.
2) Read the address of writing.
Allow time for the cancellation of
external device interrupt requests and
for the INTC to respond to
cancellation requests
Allow at leas 8 bus-clock cycles for
cancellation and the INTC response
time.
Clear the IRQ level interrupt
request holding in the detection circuit
and clear the IRQ interrupt source
1) Set the corresponding bit in
INTMSK to 1.
2) Set the corresponding bit in
INTMSKCLR to 1.
3) Read INTMSK.
End of IRQ level-sense
interrupt handling
Figure 13.4 Example of Interrupt Handling Routine
CLKOUT (ouput)
IRQ1, IRQ0 (input)
3 cycles
Figure 13.5 The time requested to detect interrupts from IRQ1 and IRQ0
Rev. 1.00 Nov. 22, 2007 Page 466 of 1692
REJ09B0360-0100