SH7764 Datasheet, PDF (673/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 17 ATAPI
Start
Same as Process (a)
Write 1 to the iERR and iNEND
bits in the interrupt enable register.
Write the following values to bits 8 to 0
in the ATAPI control register:
00m110101 for ATAPI device read and
00m110001 for ATAPI device write
Note: Set the same value as the M/S bit to m.
Same as Process (c)
End
Figure 17.10 Transfer to and from Memory via Pixel Bus by Interrupt
17.5.5 Procedure in Hardware Reset for ATAPI Device
Start
1 to RESET bit in ATAPI Control
Register.
Wait for 25 µs or more.
Write 0 to RESET bit in ATAPI
control register
End
Figure 17.11 Procedure in Hardware Reset for ATAPI Device
Rev. 1.00 Nov. 22, 2007 Page 617 of 1692
REJ09B0360-0100