SH7764 Datasheet, PDF (1080/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 22 LCD Controller (LCDC)
22.3.14 LCDC AC Modulation Signal Toggle Line Number Register (LDACLNR)
LDACLNR specifies the timing to toggle the AC modulation signal (LCD current-alternating
signal) of the LCD module.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0











ACLN[4:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W
Bit
Bit Name Initial Value R/W Description
15 to 5 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
4 to 0 ACLN[4:0] 01100
R/W AC Line Number
Set the number of lines where the LCD current-
alternating signal of the LCD module is toggled
(unit: line).
Specify to the value of (the number of toggle line) -
1.
Example: For toggling every 13 lines.
ACLN = 13-1 = 12= H'0C
Note: When the total line number of the LCD panel is even, set an even number so that toggling is
performed at an odd line.
Rev. 1.00 Nov. 22, 2007 Page 1024 of 1692
REJ09B0360-0100