SH7764 Datasheet, PDF (528/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 14 Timer Unit (TMU)
14.3 Register Descriptions
Table 14.2 shows the TMU register configuration. Table 14.3 shows the register states in each
processing mode.
Table 14.2 Register Configuration
Channel
0, 1, 2
Common
0
1
2
3, 4, 5
Common
3
4
5
Register Name
Timer output control register
Timer start register 0
Timer constant register 0
Timer counter 0
Timer control register 0
Timer constant register 1
Timer counter 1
Timer control register 1
Timer constant register 2
Timer counter 2
Timer control register 2
Input capture register 2
Timer start register 1
Timer constant register 3
Timer counter 3
Timer control register 3
Timer constant register 4
Timer counter 4
Timer control register 4
Timer constant register 5
Timer counter 5
Timer control register 5
Abbrev. R/W
TOCR R/W
TSTR0 R/W
TCOR0 R/W
TCNT0 R/W
TCR0 R/W
TCOR1 R/W
TCNT1 R/W
TCR1 R/W
TCOR2 R/W
TCNT2 R/W
TCR2 R/W
TCPR2 R
TSTR1 R/W
P4 Address
H'FFD8 0000
H'FFD8 0004
H'FFD8 0008
H'FFD8 000C
H'FFD8 0010
H'FFD8 0014
H'FFD8 0018
H'FFD8 001C
H'FFD8 0020
H'FFD8 0024
H'FFD8 0028
H'FFD8 002C
H'FFDC 0004
Area 7 Address Size
H'1FD8 0000 8
H'1FD8 0004 8
H'1FD8 0008 32
H'1FD8 000C 32
H'1FD8 0010 16
H'1FD8 0014 32
H'1FD8 0018 32
H'1FD8 001C 16
H'1FD8 0020 32
H'1FD8 0024 32
H'1FD8 0028 16
H'1FD8 002C 32
H'1FDC 0004 8
TCOR3 R/W H'FFDC 0008 H'1FDC 0008 32
TCNT3 R/W H'FFDC 000C H'1FDC 000C 32
TCR3 R/W H'FFDC 0010 H'1FDC 0010 16
TCOR4 R/W H'FFDC 0014 H'1FDC 0014 32
TCNT4 R/W H'FFDC 0018 H'1FDC 0018 32
TCR4 R/W H'FFDC 001C H'1FDC 001C 16
TCOR5 R/W H'FFDC 0020 H'1FDC 0020 32
TCNT5 R/W H'FFDC 0024 H'1FDC 0024 32
TCR5 R/W H'FFDC 0028 H'1FDC 0028 16
Rev. 1.00 Nov. 22, 2007 Page 472 of 1692
REJ09B0360-0100