SH7764 Datasheet, PDF (681/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Serial Sound Interface (SSI)
Channel Register Name
Abbreviation Power-On Reset Sleep Standby
1
Transmit suspension
SSISTPDR1
H'0000 0000
Retained Retained
transfer data register 1
Block count source
register 1
SSIBLCNTSR1 H'0000 0000
Retained Retained
Block counter 1
SSIBLCNT1
H'0000 0000
Retained Retained
n-times block transfer
interrupt count source
register 1
SSIBLNCNTSR1 H'0000 0000
Retained Retained
n-times block counter 1 SSIBLNCNT1 H'0000 0000
Retained Retained
2
DMA mode register 2
SSIDMMR2
H'0000 0000
Retained Retained
RDMA transfer source
address register 2
SSIRDMADR2 H'0000 0000
Retained Retained
RDMA transfer word
count register 2
SSIRDMCNTR2 H'0000 0000
Retained Retained
WDMA transfer
destination address
register 2
SSIWDMADR2 H'0000 0000
Retained Retained
WDMA transfer word
count register 2
SSIWDMCNTR2 H'0000 0000
Retained Retained
DMA control register 2 SSIDMCOR2 H'0000 0000
Retained Retained
Transmit suspension
block counter 2
SSISTPBLCNT2 H'0000 0000
Retained Retained
Transmit suspension
transfer data register 2
SSISTPDR2
H'0000 0000
Retained Retained
Block count source
register 2
SSIBLCNTSR2 H'0000 0000
Retained Retained
Block counter 2
SSIBLCNT2
H'0000 0000
Retained Retained
n-times block transfer
interrupt count source
register 2
SSIBLNCNTSR2 H'0000 0000
Retained Retained
n-times block counter 2 SSIBLNCNT2 H'0000 0000
Retained Retained
Common DMA operation register 0 SSIDMAOR0 H'0000 0000
to 0 to 2 _{Interrupt status register 0 SSIDMINTSR0 H'0101 0101}
Retained Retained
Retained Retained
Interrupt mask register 0 SSIDMINTMR0 H'1F1F 1F1F Retained Retained
Rev. 1.00 Nov. 22, 2007 Page 625 of 1692
REJ09B0360-0100