SH7764 Datasheet, PDF (503/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 Interrupt Controller (INTC)
Initial
Bit Bit Name Value R/W Function
Description
4
IIC
0
3
—
0
2
SRCODFI 0
1
SRCIDEI 0
0
—
0
W Clears IIC interrupt masking
Clears interrupt
W Reserved
masking for each
peripheral module.
The write value should always be 0
[When writing]
W Clears SRCODFI interrupt masking
0: Invalid
W
Clears SRCIDEI interrupt masking _{1: Interrupt mask is}
W Reserved
cleared
The write value should always be 0 _{[When reading]}
Always 0
Rev. 1.00 Nov. 22, 2007 Page 447 of 1692
REJ09B0360-0100