SH7764 Datasheet, PDF (854/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 20 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Reception flowchart
This LSI + memory
E-DMAC
Receive FIFO
EtherC
EtherC/E-DMAC
initialization
Receive
descriptor and
receive buffer
setting
Start of reception
Receive descriptor read
Ethernet
Frame reception
Receive data transfer
Receive descriptor write-back
Receive descriptor read
Receive data transfer
Receive descriptor write-back
Receive descriptor read
(preparation for receiving
the next frame)
Reception completion
Figure 20.5 Sample Reception Flowchart (Single-Frame/Two-Descriptor)
Rev. 1.00 Nov. 22, 2007 Page 798 of 1692
REJ09B0360-0100