SH7764 Datasheet, PDF (700/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Serial Sound Interface (SSI)
Bit
9 to 7
Initial
Bit Name Value R/W
SCKSIP 000
R/W
[2:0]
Description
• In SSIDMCOR2:
000: The serial bit clock or word select signal of
SSI_CH2 = SSISCK2/SSIWS2 are input.
001: Setting prohibited
010: The serial bit clock or word select signal of
SSI_CH2 = SSISCK3/SSIWS3 are input.
011: The serial bit clock or word select signal of
SSI_CH2 = SSISCK4/SSIWS4 are input.
100: The serial bit clock or word select signal of
SSI_CH2 = SSISCK5/SSIWS5 are input.
101: Setting prohibited
110: The serial bit clock or word select signal of
SSI_CH2 = SSISCK0/SSIWS0 are input.
111: The serial bit clock or word select signal of
SSI_CH2 = SSISCK1/SSIWS1 are input.
• In SSIDMCOR3:
000: The serial bit clock or word select signal of
SSI_CH3 = SSISCK3/SSIWS3 are input.
001: The serial bit clock or word select signal of
SSI_CH3 = SSISCK4/SSIWS4 are input.
010: The serial bit clock or word select signal of
SSI_CH3 = SSISCK5/SSIWS5 are input.
011: Setting prohibited
100: The serial bit clock or word select signal of
SSI_CH3 = SSISCK0/SSIWS0 are input.
101: The serial bit clock or word select signal of
SSI_CH3 = SSISCK1/SSIWS1 are input.
110: The serial bit clock or word select signal of
SSI_CH3 = SSISCK2/SSIWS2 are input.
111: Setting prohibited
Rev. 1.00 Nov. 22, 2007 Page 644 of 1692
REJ09B0360-0100