SH7764 Datasheet, PDF (295/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 9 On-Chip Memory
9.2.1 On-Chip Memory Control Register (RAMCR)
RAMCR controls the protective functions in the on-chip memory.
When updating RAMCR, please follow limitation described at section 7.2.4, On-Chip Memory
Control Register (RAMCR).
Bit : 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R R R R
Bit : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RMD RP IC2W OC2W ICWPD
Initial value : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R/W R/W R/W R/W R/W R R R R R
Bit
Bit Name
31to10 —
Initial
Value
All 0
9
RMD
0
8
RP
0
7
IC2W
0
R/W Description
R
Reserved
For read/write in these bits, refer to General
Precautions on Handling of Product.
R/W On-Chip Memory Access Mode
Specifies the right of access to the on-chip memory
from the virtual address space.
0: An access in privileged mode is allowed.
(An address error exception occurs in user mode.)
1: An access in user/ privileged mode is allowed.
R/W On-Chip Memory Protection Enable
Selects whether or not to use the protective functions
using ITLB and UTLB for accessing the on-chip
memory from the virtual address space.
0: Protective functions are not used.
1: Protective functions are used.
For further details, refer to section 9.4, On-Chip
Memory Protective Functions.
R/W IC Two-Way Mode
For further details, refer to section 8.4.3, IC Two-Way
Mode.
Rev. 1.00 Nov. 22, 2007 Page 239 of 1692
REJ09B0360-0100