SH7764 Datasheet, PDF (10/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

5.2.3 Interrupt Event Register (INTEVT)........................................................................ 98
5.2.4 Non-Support Detection Exception Register (EXPMASK) ..................................... 99
5.3 Exception Handling Functions........................................................................................... 101
5.3.1 Exception Handling Flow ..................................................................................... 101
5.3.2 Exception Handling Vector Addresses ................................................................. 101
5.4 Exception Types and Priorities .......................................................................................... 102
5.5 Exception Flow .................................................................................................................. 104
5.5.1 Exception Flow..................................................................................................... 104
5.5.2 Exception Source Acceptance............................................................................... 106
5.5.3 Exception Requests and BL Bit ............................................................................ 107
5.5.4 Return from Exception Handling.......................................................................... 107
5.6 Description of Exceptions.................................................................................................. 108
5.6.1 Resets.................................................................................................................... 108
5.6.2 General Exceptions............................................................................................... 110
5.6.3 Interrupts............................................................................................................... 126
5.6.4 Priority Order with Multiple Exceptions .............................................................. 127
5.7 Usage Notes ....................................................................................................................... 129
Section 6 Floating-Point Unit (FPU)................................................................. 131
6.1 Features.............................................................................................................................. 131
6.2 Data Formats...................................................................................................................... 132
6.2.1 Floating-Point Format........................................................................................... 132
6.2.2 Non-Numbers (NaN) ............................................................................................ 135
6.2.3 Denormalized Numbers ........................................................................................ 136
6.3 Register Descriptions......................................................................................................... 137
6.3.1 Floating-Point Registers ....................................................................................... 137
6.3.2 Floating-Point Status/Control Register (FPSCR) ................................................. 139
6.3.3 Floating-Point Communication Register (FPUL) ................................................. 142
6.4 Rounding............................................................................................................................ 143
6.5 Floating-Point Exceptions.................................................................................................. 144
6.5.1 General FPU Disable Exceptions and Slot FPU Disable Exceptions ................... 144
6.5.2 FPU Exception Sources ........................................................................................ 144
6.5.3 FPU Exception Handling ...................................................................................... 145
6.6 Graphics Support Functions............................................................................................... 146
6.6.1 Geometric Operation Instructions......................................................................... 146
6.6.2 Pair Single-Precision Data Transfer...................................................................... 147
Section 7 Memory Management Unit (MMU).................................................. 149
7.1 Overview of MMU ............................................................................................................ 150
7.1.1 Address Spaces ..................................................................................................... 152
Rev. 1.00 Nov. 22, 2007 Page x of lvi