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| SH7764 Datasheet, PDF (161/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series | |||
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Section 5 Exception Handling
Reset
Yes
requested?
No
Execute next instruction
General
exception requested?
No
Interrupt
requested?
No
Is highest-
Yes
priority exception
Yes
re-exception
type?
Cancel instruction execution
No
result
Yes
SSR â SR
SPC â PC
SGR â R15
EXPEVT/INTEVT â exception code
SR.{MD,RB,BL} â 111
SR.IMASK â received interuupt level (*)
PC â (CBCR.UBDE=1 && User_Break?
DBR: (VBR + Offset))
EXPEVT â exception code
SR. {MD, RB, BL, FD, IMASK} â 11101111
PC â H'A000 0000
Note: * When the exception of the highest priority is an interrupt.
Whether IMASK is updated or not can be set by software.
"Accepted interrupt level" is B'1111 for NMI.
Figure 5.1 Instruction Execution and Exception Handling
Rev. 1.00 Nov. 22, 2007 Page 105 of 1692
REJ09B0360-0100
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