SH7764 Datasheet, PDF (1280/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 24 Video Display Controller (VDC2)
24.4 VDC2 Configuration
The VDC2 consists of seven functional blocks listed in table 24.2. Figure 24.1 shows the entire
block diagram of the VDC2.
Table 24.2 Functional Blocks in VDC2
Block Name
Overview of Functions
Graphics block 1
(layer 1)
Reads a graphic image (RGB565: layer 1) stored in the external memory
through the pixel bus and outputs it to graphics block 2.
Graphics block 2
(layer 2)
Reads a graphic image (RGB565: layer 2) stored in the external memory
through the pixel bus, overlays it on the output from graphics block 1, and
outputs the result to graphics block 3.
Graphics block 3
(layer 3)
Reads a graphic image (RGB565: layer 3) stored in the external memory
through the pixel bus, overlays it on the output from graphics block 2, and
outputs the result to graphics block 4.
Graphics block 4
(layer 4)
Reads a graphic image (RGB565: layer 4) stored in the external memory
through the pixel bus, overlays it on the output from graphics block 3, and
outputs the resultant image data.
Display control block
Converts the output (RGB) from graphics block 4 into the YCbCr(4:2:2)
format and outputs the data in the 8:4:4 parallel format conforming to the
BTA T-1004 standard. It also outputs the control signals for the TFT-LCD
panel.
Input timing control
block
Selects the timing of the external sync signal input with respect to the
clock rising or falling edge and selects the sync signal polarity.
Output timing control
block
Controls the timing of the sync signal output with respect to the clock
rising or falling edge and controls the sync signal polarity. It also controls
the timing of the RGB666 video output signals with respect to the clock
rising or falling edge.
Note: Layers 1 to 4 have the same configuration except that the bottom layer (layer 1) receives no
image from another layer as the target of α blending.
Rev. 1.00 Nov. 22, 2007 Page 1224 of 1692
REJ09B0360-0100