SH7764 Datasheet, PDF (1009/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 21 USB 2.0 Host/Function Module (USB)
Figure 21.5 shows the timing at which a BEMP interrupt is generated when the function controller
function has been selected.
(1) Data transmission
USB bus
IN token packet
Data packet
ACK handshake
BEMP interrupt
(2) Data reception
USB bus
OUT token packet
Data packet
STALL handshake
BEMP interrupt
Figure 21.5 Timing at which BEMP Interrupt is Generated when Function Controller
Function is Selected
(4) Device State Transition Interrupt
Figure 21.6 shows a diagram of this module device state transitions. This module controls device
states and generates device state transition interrupts. However, recovery from the suspended state
(resume signal detection) is detected by means of the resume interrupt. The device state transition
interrupts can be enabled or disabled individually using INTENB0. The device state that made a
transition can be confirmed using the DVSQ bit in INTSTS0.
To make a transition to the default state, the device state transition interrupt is generated after the
reset handshake protocol has been completed.
Device state can be controlled only when the function controller function is selected. Also, the
device state transition interrupts can be generated only when the function controller function is
selected.
Rev. 1.00 Nov. 22, 2007 Page 953 of 1692
REJ09B0360-0100