SH7764 Datasheet, PDF (509/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 Interrupt Controller (INTC)
13.3.19 GPIO Interrupt Set Register (INT2GPIC)
INT2GPIC enables interrupt requests input from the following pins: PA0 to PA7 and PB0 to PB7.
A GPIO interrupt is a low active and level-sense signal. Before enabling an interrupt request, set
the corresponding pin as an input with the corresponding port control register (PTIO_A, PTIO_B).
For the port control registers, see section 27, General Purpose I/O (GPIO).
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16




PINT PINT PINT PINT
15E 14E 13E 12E




PINT PINT PINT PINT
11E 10E 9E 8E
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R/W R/W R/W R/W R R R R R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0




PINT PINT PINT PINT
7E 6E 5E 4E




PINT PINT PINT PINT
3E 2E 1E 0E
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R/W R/W R/W R/W R R R R R/W R/W R/W R/W
Bit
31 to
28
Bit Name
—
27
PINT15E
26
PINT14E
25
PINT13E
24
PINT12E
23 to —
20
19
PINT11E
Initial
Value
All 0
0
0
0
0
All 0
0
R/W Function
Description
R Reserved
Enables a GPIO
These bits are always read as 0. ^{interrupt request for}
The write value should always ^{each pin.}
be 0.
0: Disables an interrupt
R/W Enables a GPIO interrupt
request from PINT15 pin
request
1: Enables an interrupt
R/W Enables a GPIO interrupt
request from PINT14 pin
request
R/W Enables a GPIO interrupt
request from PINT13 pin
R/W Enables a GPIO interrupt
request from PINT12 pin
R Reserved
These bits are always read as 0.
The write value should always
be 0.
R/W Enables a GPIO interrupt
request from PINT11 pin
Rev. 1.00 Nov. 22, 2007 Page 453 of 1692
REJ09B0360-0100