SH7764 Datasheet, PDF (1300/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 24 Video Display Controller (VDC2)
Internal Hsync
GROPDPH + 16
GROPSW
Graphic image
area
Figure 24.9 Graphic Image Area Settings (Reading from Memory)
A graphic image area should be specified within the following range; otherwise, correct operation
is not guaranteed.
(Panel clock cycles for 1H) > GROPSW (width) + GROPDPH (horizontal display start position) +
(16 panel clock cycles)
(Lines for 1 frame) > GROPSH (height) + GROPDPV (vertical display start position) + (1 line)
Rev. 1.00 Nov. 22, 2007 Page 1244 of 1692
REJ09B0360-0100