SH7764 Datasheet, PDF (1475/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 28 Power-Down Mode
28.3.3 Module Stop Register 1 (MSTPCR1)
MSTPCR1 is a 32-bit readable/writable register that can individually start or stop the module
assigned to each bit.
MSTPCR1 can be accessed only in longwords.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SRC — — — — — SSI_B SSI_A — — — — — — — —
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R R R R R R/W R/W R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Initial
Bit
Bit Name Value R/W Description
31
SRC
0
R/W SRC Module Stop Bit
When set to 1, the clock supply to the SRC module is
halted.
0: SRC operates
1: Clock supply to SRC is halted
30 to 26 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
25
SSI_B
0
R/W SSI_B Module Stop Bit
When set to 1, the clock supply to the SSI_B module is
halted.
0: SSI_B operates
1: Clock supply to SSI_B is halted
24
SSI_A
0
R/W SSI_A Module Stop Bit
When set to 1, the clock supply to the SSI_A module is
halted.
0: SSI_A operates
1: Clock supply to SSI_A is halted
23 to 0 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Nov. 22, 2007 Page 1419 of 1692
REJ09B0360-0100