SH7764 Datasheet, PDF (714/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Serial Sound Interface (SSI)
Bit
17
16
15 to 13
12
Bit Name
Initial
Value
TXFIFOFUL2 0
(TXFIFOFUL5)
RXFIFOEMP2 1
(RXFIFOEMP5)

All 0
BLKEND1
0
(BLKEND4)
R/W Description
R/W Transmit FIFO Full 2 (5)
Indicates that the transmit FIFO buffer for SSI_CH2
(CH5) is full.
0: Indicates that the transmit FIFO buffer for SSI_CH2
(CH5) is not full.
1: Indicates that the transmit FIFO buffer for SSI_CH2
(CH5) is full.
R/W Receive FIFO Empty 2 (5)
Indicates that the receive FIFO buffer for SSI_CH2
(CH5) is empty.
0: Indicates that the receive FIFO buffer for SSI_CH2
(CH5) is not empty.
1: Indicates that the receive FIFO buffer for SSI_CH2
(CH5) is empty.
R Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Block Transfer End 1 (4)
Indicates that data transfer whose byte count is
specified by SSIBLCNTSR1 (4) has been completed.
0: Indicates that data transfer whose byte count is
specified by SSIBLCNTSR1 (4) has not been
completed.
1: Indicates that data transfer whose byte count is
specified by SSIBLCNTSR1 (4) has been
completed.
Rev. 1.00 Nov. 22, 2007 Page 658 of 1692
REJ09B0360-0100