SH7764 Datasheet, PDF (344/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Memory Controller Unit (MCU)
Initial
Bit
Bit Name Value R/W
26
DPUP
0
R/W
25

0
R
24
OPUP
0
R/W
23 to 20 
All 0 R
19
BREQEN 0
R/W
18 to 9 
All 0 R
Description
Data Pin Pull-Up Resistor Control
This bit specifies the state of the pull-up resistors on the
data pins (D63 to D0). This bit is initialized by a power-on
reset.
0: The pull-up resistors on the data pins (D63 to D0) are
turned on in some cycles before or after memory
access.
1: The pull-up resistors on the data pins (D63 to D0) are
off.
Note: If a data pin needs to be pulled up, use of an
external pull-up resistor is recommended.
Reserved
This bit is always read as 0. The write value should
always be 0.
Control Output Pin Pull-Up Resistor Control
This bit specifies the state of the pull-up resistors on the
pins A25 to A0, BS, CSn, RD, WEn/DQMn, RD/WR,
RAS, and CAS when these pins are in Hi-Z state. This bit
is initialized by a power-on reset.
0: The pull-up resistors on the control output pins are on.
1: The pull-up resistors on the control output pins are off.
Reserved
These bits are always read as 0. The write value should
always be 0.
BREQ Enable
This bit specifies whether or not an external request can
be accepted. This bit is initialized by a power-on reset.
0: An external request is not accepted.
1: An external request is accepted.
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Nov. 22, 2007 Page 288 of 1692
REJ09B0360-0100