SH7764 Datasheet, PDF (1600/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 32 List of Registers
Module
G2D
Register Name
P4 Area
Abbreviation R/W Address*²
Area 7
Address*²
Access Remarks
Size
(WPR)*¹
System control
SCLR
R/W H'FFEA 0000 H'1FEA 0000 32
×
Status
SR
R
H'FFEA 0004 H'1FEA 0004 32
×
Status register clear
SRCR
W
H'FFEA 0008 H'1FEA 0008 32
×
Interrupt enable
IER
R/W H'FFEA 000C H'1FEA 000C 32
O
Interrupt command ID ICIDR
R
H'FFEA 0010 H'1FEA 0010 32
×
Return address 0
RTN0R
R
H'FFEA 0040 H'1FEA 0040 32
O
Return address 1
RTN1R
R
H'FFEA 0044 H'1FEA 0044 32
O
Display list start address DLSAR
R/W H'FFEA 0048 H'1FEA 0048 32
×
2-dimensional source
area start address
SSAR
R/W H'FFEA 004C H'1FEA 004C 32
O
Rendering start address RSAR
R/W H'FFEA 0050 H'1FEA 0050 32
O
Work area start address WSAR
R/W H'FFEA 0054 H'1FEA 0054 32
O
Source stride
SSTRR
R/W H'FFEA 0058 H'1FEA 0058 32
O
Destination stride
DSTRR
R/W H'FFEA 005C H'1FEA 005C 32
O
Endian conversion
ENDCVR
R/W H'FFEA 0060 H'1FEA 0060 32
×
control
Source transparent color STCR
R/W H'FFEA 0080 H'1FEA 0080 32
O
Destination transparent DTCR
color
R/W H'FFEA 0084 H'1FEA 0084 32
O
Alpha value
ALPHR
R/W H'FFEA 0088 H'1FEA 0088 32
O
Color offset
COFSR
R/W H'FFEA 008C H'1FEA 008C 32
O
Rendering control
RCLR
R/W H'FFEA 00C0 H'1FEA 00C0 32
O
Command status
CSTR
R
H'FFEA 00C4 H'1FEA 00C4 32
×
Current pointer
CURR
R
H'FFEA 00C8 H'1FEA 00C8 32
×
Local offset
LCOR
R
H'FFEA 00CC H'1FEA 00CC 32
×
System clipping area SCLMAR
R
H'FFEA 00D0 H'1FEA 00D0 32
O
MAX
User clipping area MIN UCLMIR
R
H'FFEA 00D4 H'1FEA 00D4 32
O
User clipping area MAX UCLMAR
R
H'FFEA 00D8 H'1FEA 00D8 32
O
Relative user clipping RUCLMIR
R
H'FFEA 00DC H'1FEA 00DC 32
O
area MIN
Relative user clipping RUCLMAR
R
H'FFEA 00E0 H'1FEA 00E0 32
O
area MAX
Rev. 1.00 Nov. 22, 2007 Page 1544 of 1692
REJ09B0360-0100