SH7764 Datasheet, PDF (538/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 14 Timer Unit (TMU)
Select operation
Select count clock
(1)
Underflow interrupt
generation setting
(2)
When using
input capture
of channel 2
Input capture interrupt ₍₃₎
generation setting
Timer constant
register setting
(4)
(1) Select the count clock with the TPSC[2:0] bits in TCR.
When the external clock (TCLK) is selected, specify
the external clock edge with the CKEG[1:0] bits in
TCR.
(2) Specify whether an interrupt is to be generated on
TCNT underflow with the UNIE bit in TCR.
(3) When the input capture function is used, set the ICPE
bits in TCR, including specification of whether the
interrupt function is to be used.
(4) Set a value in TCOR.
(5) Set the initial value inTCNT.
(6) Set the STR bit to 1 in TSTR to start the count.
Set initial timer
counter value
(5)
Start count
(6)
Note: When an interrupt is generated, clear the source flag in the interrupt handler.
If the interrupt enabled state is set without clearing the flag, another interrupt will be generated.
Figure 14.2 Example of Count Operation Setting Procedure
Rev. 1.00 Nov. 22, 2007 Page 482 of 1692
REJ09B0360-0100