SH7764 Datasheet, PDF (1700/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 33 Electrical Characteristics
33.4.14 EtherC Module Signal Timing
Table 33.32 Ether Net Controller Timing
Conditions: 3.3-V power supply= 3.0 to 3.6 V, 1.2-V power supply= 1.15 to 1.35,
Ta = –20 to 85°C, –40 to 85°C
Item
Symbol
Min.
Max.
Unit
Figure
TX-CLK cycle time
t
Tcyc
40

ns
33.68
TX-EN output delay time
t_TENd
1
20
ns
MII_TXD[3:0] output delay time t_MTDd
1
20
ns
CRS setup time
t
CRSs
10

ns
CRS hold time
t
CRSh
10

ns
COL setup time
t
COLs
10

ns
33.69
COL hold time
t
COLh
10

ns
RX-CLK cycle time
t_Rcyc
40

ns
33.70
RX-DV setup time
t
RDVs
10

ns
RX-DV hold time
t_RDVh
10

ns
MII_RXD[3:0] setup time
t_MRDs
10

ns
MII_RXD[3:0] hold time
t_MRDh
10

ns
RX-ER setup time
t
RERs
10

ns
33.71
RX-ER hold time
t
RERh
10

ns
MDIO setup time
t
MDIOs
10

ns
33.72
MDIO hold time
t
MDIOh
10

ns
MDIO output data hold time*
t_MDIOdh
5
18
ns
33.73
WOL output delay time
t
1
20
ns
33.74
WOLd
EXOUT output delay time
t_EXOUTd
1
20
ns
33.75
Note: * Operate the internal register (PIR) in PHY block to meet the requirement of this
specification.
Rev. 1.00 Nov. 22, 2007 Page 1644 of 1692
REJ09B0360-0100