SH7263 Datasheet, PDF (976/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 19 Controller Area Network (RCAN-TL1)
001
010
011
100
101
110
111
TSG2
2
3
4
5
6
7
8
TSEG2
TSG1 TSEG1
0011 4
No
1-3
No
No
No
No
No
0100 5
1-2
1-3
1-4
No
No
No
No
0101 6
1-2
1-3
1-4
1-4
No
No
No
0110 7
1-2
1-3
1-4
1-4
1-4
No
No
0111 8
1-2
1-3
1-4
1-4
1-4
1-4
No
1000 9
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1001 10
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1010 11
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1011 12
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1100 13
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1101 14
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1110 15
1-2
1-3
1-4
1-4
1-4
1-4
1-4
1111 16
1-2
1-3
1-4
1-4
1-4
1-4
1-4
Example 1: For a bit rate of 500 kbps when the fclk frequency is 32 MHz, satisfy the following
conditions: BRP = 3, TSEG1 = 11, TSEG2 = 4. Write H'A300 to BCR1 and H'0001 to BCR0.
Example 2: For a bit rate of 500 kbps when the fclk frequency is 20 MHz, satisfy the following
conditions: BRP = 1, TSEG1 = 6, TSEG2 = 3. Write H'5200 to BCR1 and H'0001 to BCR0.
Rev. 2.00 Mar. 14, 2008 Page 942 of 1824
REJ09B0290-0200