SH7263 Datasheet, PDF (139/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 4 Clock Pulse Generator (CPG)
• Mode 2
In mode 2, the CKIO pin functions as an input pin and draws an external clock signal. The
PLL circuit shapes waveform and the frequency is multiplied according to the frequency
control register setting before the clock is supplied to the LSI. The frequency range of CKIO is
from 40 to 66.66 MHz. To reduce current consumption, fix the EXTAL pin (pull up, pull
down, connect to power supply, or connect to ground) and open the XTAL pin when the
SH7263 is used in mode 2. When USB is not used, fix the USB_X1 pin (pull up, pull down,
connect to power supply, or connect to ground) and open the USB_X2 pin.
• Mode 3
In mode 3, clock is input from the USB_X1 pin or the crystal oscillator. The external clock is
input through this pin and waveform is shaped in the PLL circuit. Then the frequency is
multiplied according to the frequency control register setting before the clock is supplied to the
LSI. The frequency of CKIO is the same as that of the input clock (USB_X1/crystal resonator)
(48 MHz). To reduce current consumption, fix the EXTAL pin (pull up, pull down, connect to
power supply, or connect to ground) and open the XTAL pin when the SH7263 is used in
mode 3. When the USB crystal resonator is not used, open the USB_X2 pin.
Rev. 2.00 Mar. 14, 2008 Page 105 of 1824
REJ09B0290-0200