SH7263 Datasheet, PDF (1183/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
21.6.6 Note on Stream Data Transfer (1)
When reading of the stream data is slower than writing of the stream data, the buffer of the CD-
ROM decoder will overflow. This causes the CD-ROM decoder to be abnormally stopped.
Caution is required in writing and reading of the stream data. Sample combinations of stream data
transfer settings are shown below.
Table 21.4 Sample Combinations of Stream Data Transfer Settings
Stream Input
Stream Output
LW/cycle-stealing transfer by
DMA (without padding)
(1) 16-byte/cycle-stealing transfer by DMA (16 bytes*)
(2) Burst transfer by DMA (16 bytes*, longword, word)
LW/cycle-stealing transfer by
DMA (with padding)
(1) Cycle-stealing transfer by DMA (16 bytes*, longword)
(2) Burst transfer by DMA (16 bytes*, longword, word)
LW write by CPU
(1) Cycle-stealing transfer by DMA (16 bytes*, longword, word)
(2) Burst transfer by DMA (16 bytes*, longword, word)
Note: * Set bit 25 in the DMA channel control register (CHCRn) to 1, as well as making the
regular settings for 16-byte transfer.
21.6.7 Note on Stream Data Transfer (2)
When reading the stream data, be sure to use either the DMA or the CPU. If both the DMA and
the CPU are used for reading, the stream data may not be recognized as being in the CD-ROM
format.
Rev. 2.00 Mar. 14, 2008 Page 1149 of 1824
REJ09B0290-0200