SH7263 Datasheet, PDF (1794/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 35 Electrical Characteristics
35.4.17 SDHI Timing
Table 35.24 SDHI Timing
Conditions: VCC = PLLVCC = USBDVCC = 1.1 to 1.3 V, PVCC = USBDPVCC = 3.0 to 3.6 V,
AVCC = 3.0 to 3.6 V, USBAVCC = 1.1 to 1.3 V, USBAPVCC = 3.0 to 3.6 V,
VSS = PLLVSS = PVSS = AVSS = USBDVSS = USBAVSS = USBDPVSS =
USBAPVSS = 0 V, Ta = −40 to 85 °C
Item
SD_CLK clock cycle
SD_CLK clock high width
SD_CLK clock low width
SD_CMD, SD_D3 to SD_D0 output data delay
(data transfer mode)
SD_CMD, SD_D3 to SD_D0 input data setup
SD_CMD, SD_D3 to SD_D0 input data hold
Symbol Min.
Max.
tSDPP
2 × tpcyc ⎯
tSDWH
0.4 × tSDPP ⎯
tSDWL
0.4 × tSDPP ⎯
tSDODLY
⎯
14
Unit Figure
ns Figure
ns ^35.79
ns
ns
tSDISU
5
tSDIH
5
⎯
ns
⎯
ns
SD_CLK
SD_CMD, SD_D3 to SD_D0 input
t_SDPP
t_SDWL
t_SDWH
t_SDISU t_SDIH
SD_CMD, SD_D3 to SD_D0 output
t_SDODLY (max)
t_SDODLY (min)
Figure 35.79 SD Card Interface
Rev. 2.00 Mar. 14, 2008 Page 1760 of 1824
REJ09B0290-0200