SH7263 Datasheet, PDF (1603/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 32 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
6, 5
⎯
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
4
IEBSRST 0
R/W IEB Software Reset
Controls the IEB reset by software
0: Cancels the IEB reset.
1: Puts the IEB in the reset state.
3
SSI3SRST 0
R/W SSI3 Software Reset
Controls the SSI3 reset by software
0: Cancels the SSI3 reset.
1: Puts the SSI3 in the reset state.
2
SSI2SRST 0
R/W SSI2 Software Reset
Controls the SSI2 reset by software
0: Cancels the SSI2 reset.
1: Puts the SSI2 in the reset state.
1
SSI1SRST 0
R/W SSI1 Software Reset
Controls the SSI1 reset by software
0: Cancels the SSI1 reset.
1: Puts the SSI1 in the reset state.
0
SSI0SRST 0
R/W SSI0 Software Reset
Controls the SSI0 reset by software
0: Cancels the SSI0 reset.
1: Puts the SSI0 in the reset state.
Rev. 2.00 Mar. 14, 2008 Page 1569 of 1824
REJ09B0290-0200