SH7263 Datasheet, PDF (1170/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 21 CD-ROM Decoder (ROM-DEC)
(3) Interpolated Sync Mode
In interpolated sync mode, synchronization is always driven by the internal counter after a sync
code pattern has been detected at the start of decoding. Accordingly, this mode is effective when
the sync patterns have been damaged.
However, decoding becomes incorrect after a change to the synchronization timing, since the
change in timing is not followed.
Figure 21.12 shows the operation in interpolated sync mode.
Input data
Sync code
detection
Output data
Sector 1
Abnormal sector
Sector 3
Sector 4
Sector 5
Maintain Ignore Maintain Ignore Maintain Ignore Maintain
Sector 1
Abnormal
sector
Abnormal
sector
Abnormal
sector
Figure 21.12 Operation in Interpolated Sync Mode
Abnormal
sector
Rev. 2.00 Mar. 14, 2008 Page 1136 of 1824
REJ09B0290-0200