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SH7263 Datasheet, PDF (1265/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Section 25 USB 2.0 Host/Function Module (USB)
• Function that automatically clears the buffer memory after the data for the pipe specified at the
DnFIFO (n = 0 or 1) port has been read (DCLRM)
• NAK setting function for response PID generated by end of transfer (SHTNAK)
25.2 Input/Output Pins
Table 25.1 shows the pin configuration and pin functions of the USB.
When this module is not in use, handle the pins as follows.
• Be sure to apply power to the power-supply pins
• Connect DP, DM, and VBUS to USBDPVSS
• Connect REFRIN to USBAPVCC through a 5.6 kΩ ±1% resistor
• For USB_X1 and USB_X2, see section 4.3, Clock Operating Modes
Table 25.1 USB Pin Configuration
Category
USB bus
interface
Name
USB D+ data
USB D- data
VBUS
monitor
input
VBUS input
Reference Reference input
resistance
Pin Name
DP
DM
VBUS
REFRIN
I/O Function
I/O D+ I/O of the USB on-chip transceiver
This pin should be connected to the D+ pin
of the USB bus.
I/O D− I/O of the USB on-chip transceiver
This pin should be connected to the D- pin of
the USB bus.
Input USB cable connection monitor pin
This pin should be connected directly to the
Vbus of the USB bus. Whether the Vbus is
connected or disconnected can be detected.
If this pin is not connected with the Vbus of
the USB bus, it should be supplied with 5 V.
It should be supplied with 5 V also when the
host controller function is selected.
Note: Vbus is not provided to the connected
device.
Input Reference resistor connection pin
This pin should be connected to USBAPV
SS
through a 5.6 kΩ ±1% resistor.
Rev. 2.00 Mar. 14, 2008 Page 1231 of 1824
REJ09B0290-0200