SH7263 Datasheet, PDF(1068/1862 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

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SH7263 Datasheet, PDF (1068/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

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Section 20 IEBusTM Controller (IEB)

Initial

Bit

Bit Name Value R/W Description

2 to 0 CMD

000

W

Command

These bits issue a command to control IEB

communications. When the CMX flag in IEFLG is set

after the command issuance, the command is indicated

to be in execution. When the CMX flag becomes 0, the

operation state is entered.

000: No operation. Operation is not affected.

001: Unlock (required from other units)*1

010: Requires communications as the master

011: Stops master communications*2

100: Undefined bits*4

101: Requires data transfer from the slave

110: Stops data transfer from the slave*3

111: Undefined bits*4

Notes: 1. Do not execute this command in slave communications.

2. This command is valid during master communications (MRQ = 1). In other states, this

command issuance is ignored. If this command is issued in master communications, the

communications controller immediately enters the wait state. At this time, the issued

master transmission request ends (MRQ = 0).

3. This command is valid during slave communications (SRQ = 1). In other states, this

command issuance is ignored. Once this command is issued in slave transmission, the

SRQ flag is 0 before slave transmission. Therefore, a transmit request from the master

is not responded to. If a transmit request is issued during slave transmission, the

transmission stops and the wait state is entered (SRQ = 0).

4. Undefined bits. Issuing this command does not affect operation.

Rev. 2.00 Mar. 14, 2008 Page 1034 of 1824

REJ09B0290-0200

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