SH7263 Datasheet, PDF (42/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 1 Overview
Items
Specification
AND/NAND flash
memory controller
(FLCTL)
• Direct-connected memory interface with AND-/NAND-type flash
memory
• Read/write in sectors
• Two types of transfer modes: Command access mode and sector
access mode (512-byte data + 16-byte management code: with ECC)
• Interrupt request and DMAC transfer request
• Supports flash memory requiring 5-byte addresses (2 Gbits and more)
USB2.0 host/function • Conforms to the Universal Serial Bus Specification Revision 2.0
module (USB)
• 480-Mbps and 12-Mbps transfer rates provided
• Can be used as function
• Software setting supported
• On-chip 8-Kbyte RAM as communication buffers
Sampling rate
converter (SRC)
• Data format: 32-bit stereo (16 bits each to L/R), 16-bit monaural
• Input sampling rate: 8/11.025/12/16/22.05/24/32/44.1/48 kHz
• Output sampling rate: 44.1/48 kHz
LCD controller (LCDC) • From 16 × 1 to 1024 × 1024 dots supported
• Supports 4/8/15/16-bpp color modes
• Supports 1/2/4/6-bpp gray scale modes
• TFT/DSTN/STN panels supported
• Signal polarity setting function
• 24-bit color pallet memory (16 of the 24 bits are valid; R:5/G:6/B:5)
• Unified graphics memory architecture
SD host interface
(SDHI)
• SD memory I/O card interface (1-/4-bits SD bus)
• Error check function: CRC7 (command), CRC16 (data)
• MMC (MultiMediaCard) access
Note:
• Interrupt requests
SDHI is included or
not depending on the
product code.
⎯ Card access interrupt
⎯ SDIO access interrupt
⎯ Card detect interrupt
• DMA transfer requests
⎯ SD_BUF write
⎯ SD_BUF read
• Card detect function, write protect supported
Rev. 2.00 Mar. 14, 2008 Page 8 of 1824
REJ09B0290-0200