SH7263 Datasheet, PDF (1388/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
(3) Interval Counter
The isochronous interval can be set using the IITV bits in PIPEPERI. The interval counter enables
the functions shown in table 25.26 when the function controller function is selected. When the
host controller function is selected, this module generates the token issuance timing. When the
host controller function is selected, the interval counter operation is the same as the interrupt
transfer operation.
Table 25.26 Functions of the Interval Counter when the Function Controller Function is
Selected
Transfer
Direction
IN
OUT
Function
IN buffer flush function
Notifies that a token not
being received
Conditions for Detection
When a token cannot be normally received in the
interval frame during an isochronous IN transfer
When a token cannot be normally received in the
interval frame during an isochronous OUT transfer
The interval count is carried out when an SOF is received or for interpolated SOFs, so the
isochronism can be maintained even if an SOF is damaged. The frame interval that can be set is
the 2^IITV frame or 2 μ ^IITV frames.
(a) Counter Initialization when the Function Controller Function is Selected
This module initializes the interval counter under the following conditions.
1. Power-on reset
The IITV bit is initialized.
2. Software reset
The IITV bit is initialized.
3. USB bus reset
The IITV bit is not initialized, but the counting is initialized.
4. Buffer memory initialization using the ACLRM bit
The IITV bits are not initialized but the count value is. Setting the ACLRM bit to 0 starts
counting from the value set in the IITV bits.
Rev. 2.00 Mar. 14, 2008 Page 1354 of 1824
REJ09B0290-0200