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| SH7263 Datasheet, PDF (1105/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series | |||
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Section 20 IEBusTM Controller (IEB)
20.6 Operation Timing
20.6.1 Master Transmit Operation
Figure 20.13 shows the timing for master transmit operation.
Slave
reception
DL
Dn-1 Dn
Master
transmission
HD MA SA CT DL D1 D2
IECMR
IEFLG
CMX
MRQ
Master transmission request
SRQ
SRE
IETSR
TXS
TXF
[Legend]
HD: Header
MA: Master address field
SA: Slave address field
CT: Control field
DL: Message length field
Dn: Data field
Figure 20.13 Master Transmit Operation Timing
Dn-1 Dn
Rev. 2.00 Mar. 14, 2008 Page 1071 of 1824
REJ09B0290-0200
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