SH7263 Datasheet, PDF (1371/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 25 USB 2.0 Host/Function Module (USB)
1 should not be written for the TGL bit in the following circumstances.
• When DCP is selected
• While the buffer memory is being read
• Pipes in the buffer memory writing direction
(d) Clearing the Buffer Memory on the SIE (CFIFO Port Writing Direction)
This module can cancel data that is waiting to be sent, by confirming the SBUSY bit in CFIFOSIE
and setting 1 for the SCLR bit.
PID = NAK should be set and SBUSY = 0 confirmed, and then SCLR = 1 written. This module is
then able to write new data from CFIFO. This function can be used only in the buffer memory
writing direction. Also, the BRDY interrupt is generated by the SCLR bit.
1 should not be written for the SCLR bit in the following circumstances.
• When DCP is selected
• While data is being written to the buffer memory
• Pipes in the buffer memory reading direction
(e) Transaction Counter (D0FIFO/D1FIFO Port Reading Direction)
When the specified number of transactions has been completed in the data packet receiving
direction, this module is able to recognize that the transfer has ended. The transaction counter is a
function that operates when the pipe selected by means of the D0FIFO/D1FIFO port has been set
in the direction of reading data from the buffer memory. The transaction counter has TRNCNT
that specifies the number of transactions and a current counter that counts the transactions
internally. When the current counter matches the number of transactions specified in TRNCNT,
reading is enabled for the buffer memory. The current counter of the transaction counter function
is initialized by the TRCLR bit, so that the transactions can be counted again starting from the
beginning. The information read by TRNCNT differs depending on the setting of the TRENB bit.
• TRENB = 0: The set transaction counter value can be read.
• TRENB = 1: The value of the current counter that counts the transactions internally can be
read.
The conditions for changing the CURPIPE bit are as noted below.
• The CURPIPE bit should not be changed until the transaction for the specified pipe has ended.
• The CURPIPE bit cannot be changed if the current counter has not been cleared.
Rev. 2.00 Mar. 14, 2008 Page 1337 of 1824
REJ09B0290-0200