SH7263 Datasheet, PDF (663/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
(5) Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Complementary PWM Mode
Figure 11.117 shows an explanatory diagram of the case where an error occurs in normal mode
and operation is restarted in complementary PWM mode after re-setting.
MTU2 module output
1
2
3
4
5
6
RESET TMDR TOER TIOR PFC TSTR
(normal) (1) (1 init (MTU2) (1)
0 out)
7
8
9
10
Match Error PFC TSTR
occurs (PORT) (0)
11 12 13 14 15 (16) (17) (18)
TIOR TIOR TOER TOCR TMDR TOER PFC TSTR
(0 init (disabled) (0)
(CPWM) (1) (MTU2) (1)
0 out)
TIOC3A
TIOC3B
TIOC3D
Port output
PE8
High-Z
PE9
High-Z
PE11
High-Z
Figure 11.117 Error Occurrence in Normal Mode,
Recovery in Complementary PWM Mode
1 to 10 are the same as in figure 11.113.
11. Initialize the normal mode waveform generation section with TIOR.
12. Disable operation of the normal mode waveform generation section with TIOR.
13. Disable channel 3 and 4 output with TOER.
14. Select the complementary PWM output level and cyclic output enabling/disabling with
TOCR.
15. Set complementary PWM.
16. Enable channel 3 and 4 output with TOER.
17. Set MTU2 output with the PFC.
18. Operation is restarted by TSTR.
Rev. 2.00 Mar. 14, 2008 Page 629 of 1824
REJ09B0290-0200