SH7263 Datasheet, PDF (547/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
11.3.29 Timer Waveform Control Register (TWCR)
TWCR is an 8-bit readable/writable register that controls the waveform when synchronous counter
clearing occurs in TCNT_3 and TCNT_4 in complementary PWM mode and specifies whether to
clear the counters at TGRA_3 compare match. The CCE bit and WRE bit in TWCR must be
modified only while TCNT stops.
Bit: 7
6
5
4
3
2
1
0
CCE
-
-
-
-
-
- WRE
Initial value: 0* 0
0
0
0
0
0
0
R/W: R/(W) R
R
R
R
R
R R/(W)
Note: * Do not set to 1 when complementary PWM mode is not selected.
Bit
Bit Name
7
CCE
6 to 1 —
Initial
Value
0*
All 0
R/W
R/(W)
R
Description
Compare Match Clear Enable
Specifies whether to clear counters at TGRA_3
compare match in complementary PWM mode.
0: Does not clear counters at TGRA_3 compare match
1: Clears counters at TGRA_3 compare match
[Setting condition]
• When 1 is written to CCE after reading CCE = 0
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 2.00 Mar. 14, 2008 Page 513 of 1824
REJ09B0290-0200