SH7263 Datasheet, PDF (1192/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 22 A/D Converter (ADC)
Bit
7, 6
5 to 3
Bit Name
CKS[1:0]
MDS[2:0]
Initial
Value
01
000
R/W Description
R/W Clock Select
These bits select the A/D conversion time. Set the A/D
conversion time while A/D conversion is halted
(ADST = 0).
00: Conversion time = 138 states (maximum),
clock = Pφ/4
01: Conversion time = 274 states (maximum),
clock = Pφ/8
10: Conversion time = 546 states (maximum),
clock = Pφ/16
11: Setting prohibited
R/W Multi-scan Mode
These bits select the operating mode for A/D
conversion.
0xx: Single mode
100: Multi mode: A/D conversion on 1 to 4 channels
101: Multi mode: A/D conversion on 1 to 8 channels
110: Scan mode: A/D conversion on 1 to 4 channels
111: Scan mode: A/D conversion on 1 to 8 channels
Rev. 2.00 Mar. 14, 2008 Page 1158 of 1824
REJ09B0290-0200