SH7263 Datasheet, PDF (40/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 1 Overview
Items
Specification
Serial communication • Four channels
interface with FIFO
(SCIF)
• Clocked synchronous or asynchronous mode selectable
• Simultaneous transmission and reception (full-duplex communication)
supported
• Dedicated baud rate generator
• Separate 16-byte FIFO registers for transmission and reception
• Modem control function (in asynchronous mode)
Synchronous serial
communication unit
(SSU)
• Master mode and slave mode selectable
• Standard mode and bidirectional mode selectable
• Transmit/receive data length can be selected from 8, 16, and 32 bits.
• Full-duplex communication (transmission and reception executed
simultaneously)
• Consecutive serial communication
I²C bus interface 3
(IIC3)
• Two channels
• Four channels
• Master mode and slave mode supported
Serial sound interface • Four-channel bidirectional serial transfer
(SSI)
• Support of various serial audio formats
• Support of master and slave functions
• Generation of programmable word clock and bit clock
• Multi-channel formats
• Support of 8, 16, 18, 20, 22, 24, and 32-bit data formats
Controller area
• Two channels
network (RCAN-TL1) _{• TTCAN level 1 supports for all channels}
• BOSCH 2.0B active compatible
• Buffer size: transmit/receive × 31, receive only × 1
• Two or more RCAN-TL1 channels can be assigned to one bus to
increase number of buffers with a granularity of 32 channels
• 31 Mailboxes for transmission or reception
Rev. 2.00 Mar. 14, 2008 Page 6 of 1824
REJ09B0290-0200