SH7263 Datasheet, PDF (1494/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 29 Pin Function Controller (PFC)
Table 29.6 Multiplexed Pins (Port F)
00
Setting Function 1
Register (Related Module)
PFCRH4 PF30 I/O (port)
PF29 I/O (port)
PF28 I/O (port)
PFCRH3 PF27 I/O (port)
PF26 I/O (port)
PF25 I/O (port)
PF24 I/O (port)
PFCRH2 PF23 I/O (port)
PF22 I/O (port)
PF21 I/O (port)
PF20 I/O (port)
PFCRH1 PF19 I/O (port)
PF18 I/O (port)
PF17 I/O (port)
PF16 I/O (port)
PFCRL4 PF15 I/O (port)
PF14 I/O (port)
PF13 I/O (port)
PF12 I/O (port)
Setting of Mode Bits (PFnMD[1:0])
01
10
11
Function 2
(Related Module)
Function 3
(Related Module)
Function 4
(Related Module)
AUDIO_CLK input (SSI) ⎯
⎯
SSIDATA3 I/O (SSI) ⎯
⎯
SSIWS3 I/O (SSI)
⎯
⎯
SSISCK3 I/O (SSI)
⎯
⎯
SSIDATA2 I/O (SSI) ⎯
⎯
SSIWS2 I/O (SSI)
⎯
⎯
SSISCK2 I/O (SSI)
⎯
⎯
SSIDATA1 I/O (SSI)
LCD_VEPWC output ⎯
(LCDC)
SSIWS1 I/O (SSI)
LCD_VCPWC output ⎯
(LCDC)
SSISCK1 I/O (SSI)
LCD_CLK input (LCDC) ⎯
SSIDATA0 I/O (SSI) LCD_FLM output
⎯
(LCDC)
SSIWS0 I/O (SSI)
LCD_M_DISP output ⎯
(LCDC)
SSISCK0 I/O (SSI)
LCD_CL2 output
⎯
(LCDC)
FCE output (FLCTL) LCD_CL1 output
⎯
(LCDC)
FRB input (FLCTL)
LCD_DON output
⎯
(LCDC)
NAF7 I/O (FLCTL)
LCD_DATA15 output SD_CD input (SDHI)
(LCDC)
NAF6 I/O (FLCTL)
LCD_DATA14 output SD_WP input (SDHI)
(LCDC)
NAF5 I/O (FLCTL)
LCD_DATA13 output SD_D1 I/O (SDHI)
(LCDC)
NAF4 I/O (FLCTL)
LCD_DATA12 output SD_D0 I/O (SDHI)
(LCDC)
Rev. 2.00 Mar. 14, 2008 Page 1460 of 1824
REJ09B0290-0200