SH7263 Datasheet, PDF (1526/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 29 Pin Function Controller (PFC)
29.2.7 Port E I/O Register L (PEIORL)
PEIORL is 16-bit readable/writable register that is used to set the pins on port E as inputs or
outputs. The PE15IOR to PE0IOR bits correspond to the PE15/IOIS16/RTS3 to
PE0/BS/RxD0/ADTRG pins respectively. PEIORL is enabled when the port E pins are
functioning as general-purpose inputs/outputs (PE15 to PE0). In other states, it is disabled. If a bit
in PEIORL is set to 1, the corresponding pin on port E functions as an output pin. If it is cleared to
0, the corresponding pin functions as an input pin.
Bit:
Initial value:
R/W:
15
PE15
IOR
0
R/W
14
PE14
IOR
0
R/W
13
PE13
IOR
0
R/W
12
PE12
IOR
0
R/W
11
PD11
IOR
0
R/W
10
PE10
IOR
0
R/W
9
PE9
IOR
0
R/W
8
PE8
IOR
0
R/W
7
PE7
IOR
0
R/W
6
PE6
IOR
0
R/W
5
PE5
IOR
0
R/W
4
PE4
IOR
0
R/W
3
PE3
IOR
0
R/W
2
PE2
IOR
0
R/W
1
PE1
IOR
0
R/W
0
PE0
IOR
0
R/W
29.2.8 Port E Control Registers L1 to L4 (PECRL1 to PECRL4)
PECRL1 to PECRL4 are 16-bit readable/writable registers that are used to select the functions of
the multiplexed pins on port E.
(1) Port E Control Register L4 (PECRL4)
Bit: 15
-
Initial value: 0
R/W: R
14 13 12 11
-
PE15MD[1:0]
-
0
0
0
0
R R/W R/W R
10 9
8
7
-
PE14MD[1:0]
-
0
0
0
0
R R/W R/W R
6
5
4
3
-
PE13MD[1:0]
-
0
0
0
0
R R/W R/W R
2
1
0
-
PE12MD[1:0]
0
0
0
R R/W R/W
Initial
Bit
Bit Name Value R/W Description
15, 14 ⎯
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
13, 12 PE15MD[1:0] 00
R/W PE15 Mode
Select the function of the PE15/IOIS16/RTS3 pin.
00: PE15 I/O (port)
01: IOIS16 input (BSC)
10: Setting prohibited
11: RTS3 I/O (SCIF)
Rev. 2.00 Mar. 14, 2008 Page 1492 of 1824
REJ09B0290-0200