SH7263 Datasheet, PDF (1020/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 19 Controller Area Network (RCAN-TL1)
RCAN-TL1 Registers
MBIMR
MCR IRR
timer
Flag_ Mailbox
Status Mode GSR IMR BCR TT_register register (ctrl0, LAFM)
Mailbox Mailbox
(data) (ctrl1)
Mailbox
Trigger
Time TT
control
Reset
yes yes yes yes
Transmission yes yes no*¹ yes
Reception
Halt Request
Halt
yes yes no*¹ yes
yes
yes
yes
yes
yes
yes
no*¹
yes*² yes*²
no*¹ yes*² yes*²
yes
yes
yes
yes
yes
Sleep
yes yes no no
Notes: 1. No hardware protection.
2. When TXPR is not set.
no
no
no
no
no
Rev. 2.00 Mar. 14, 2008 Page 986 of 1824
REJ09B0290-0200