SH7263 Datasheet, PDF (946/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 19 Controller Area Network (RCAN-TL1)
H'000
H'002
H'004
H'006
H'008
H'00A
H'00C
Bit 15
Bit 0
Master Control Register (MCR)
General Status Register(GSR)
Bit Configuration Register 1 (BCR1)
Bit Configuration Register 0 (BCR0)
Interrupt Request Register (IRR)
Interrupt Mask Register (IMR)
Transmit Error
Counter (TEC)
Receive Error
Counter (REC)
H'020
H'022
Transmit Pending Register (TXPR1)
Transmit Pending Register (TXPR0)
H'028
H'02A
Transmit Cancel Register (TXCR1)
Transmit Cancel Register (TXCR0)
H'030 _{Transmit Acknowledge Register (TXACK1)}
H'032 _{Transmit Acknowledge Register (TXACK0)}
H'038
H'03A
Abort Acknowledge Register (ABACK1)
Abort Acknowledge Register (ABACK0)
H'040
H'042
Receive Pending Register (RXPR1)
Receive Pending Register (RXPR0)
H'048 _{Remote Frame Pending Register (RFPR1)}
H'04A _{Remote Frame Pending Register (RFPR0)}
H'050 _{Mailbox Interrupt Mask Register (MBIMR1)}
H'052 _{Mailbox Interrupt Mask Register (MBIMR0)}
H'058 _{Unread Message Status Register (UMSR1)}
H'05A _{Unread Message Status Register (UMSR0)}
H'080
H'082
H'084
Timer Trigger Control Register0 (TTCR0)
Cycle Maximum/Tx-Enable Window
Register (CMAX_TEW)
H'086 Reference Trigger Offset Register (RFTROFF)
H'088
Timer Status Register (TSR)
H'08A
Cycle Counter Register (CCR)
H'08C
Timer Counter Register (TCNTR)
H'08E
H'090
H'092
H'094
H'096
Cycle Time Register (CYCTR)
Reference Mark Register (RFMK)
H'098 _{Timer Compare Match Register 0 (TCMR0)}
H'09A
H'09C _{Timer Compare Match Register 1 (TCMR1)}
H'09E
H'0A0 _{Timer Compare Match Register 2 (TCMR2)}
H'0A4 _{Tx-Trigger Time Selection Register (TTTSEL)}
H'100
H'104
H'108
H'10A
H'10C
H'10E
H'110
Mailbox-0 Control 0
(StdID, ExtID, Rtr, Ide)
LAFM
0
1
2
3
Mailbox 0 Data (8 bytes)
4
5
6
7
Mailbox-0 Control 1 (NMC, MBC, DLC)
Timestamp
H'120
H'140
H'160
Mailbox-1 Control/LAFM/Data etc.
Mailbox-2 Control/LAFM/Data etc.
Mailbox-3 Control/LAFM/Data etc.
H'2E0
H'300
Mailbox-15 Control/LAFM/Data etc.
Mailbox-16 Control/LAFM/Data etc.
H'4A0
H'4C0
H'4E0
Mailbox-29 Control/LAFM/Data etc.
Mailbox-30 Control/LAFM/Data etc.
Mailbox-31 Control/LAFM/Data etc.
Figure 19.2 RCAN-TL1 Memory Map
The locations not used (between H'000 and H'4F3) are reserved and cannot be accessed.
Rev. 2.00 Mar. 14, 2008 Page 912 of 1824
REJ09B0290-0200