SH7263 Datasheet, PDF (318/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

Section 9 Bus State Controller (BSC)
Initial
Bit
Bit Name Value R/W Description
4, 3
A3ROW[1:0] 00
R/W Number of Bits of Row Address for Area 3
Specify the number of bits of the row address for
area 3.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
2
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
1, 0
A3COL[1:0] 00
R/W Number of Bits of Column Address for Area 3
Specify the number of bits of the column address for
area 3.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)
Rev. 2.00 Mar. 14, 2008 Page 284 of 1824
REJ09B0290-0200