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SH7263 Datasheet, PDF (327/1862 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series | |||
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Section 9 Bus State Controller (BSC)
Table 9.8 32-Bit External Device Access and Data Alignment in Little Endian
Operation
D31 to
D24
Byte access â¯
at 0
Byte access â¯
at 1
Byte access â¯
at 2
Byte access Data
at 3
7 to 0
Word access â¯
at 0
Word access Data
at 2
15 to 8
Longword Data
access at 0 31 to 24
Data Bus
D23 to
D16
D15 to
D8
â¯
â¯
â¯
Data
7 to 0
â¯
Data
7 to 0
â¯
â¯
â¯
Data
7 to 0
Data
23 to 16
Data
15 to 8
â¯
Data
15 to 8
WE3,
D7 to D0 DQMUU
Data
â¯
7 to 0
â¯
â¯
â¯
â¯
â¯
Assert
Data
7 to 0
â¯
â¯
Assert
Data
7 to 0
Assert
Strobe Signals
WE2,
DQMUL
WE1,
DQMLU
â¯
â¯
â¯
Assert
Assert
â¯
â¯
â¯
â¯
Assert
Assert
â¯
Assert
Assert
WE0,
DQMLL
Assert
â¯
â¯
â¯
Assert
â¯
Assert
Rev. 2.00 Mar. 14, 2008 Page 293 of 1824
REJ09B0290-0200
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